There have been known a coherent detector and a differential detector as the detector to be used for demodulation of digital phase modulated signals. The coherent detector is known to achieve the highest performance theoretically, but in the transmission channels where high speed fading exists such as mobile communication system, a differential detector is often found more advantageous than the former.
FIG. 39 is a block diagram to show the basic structure of a coherent detector.
In the figure, phase modulated signals are inputted via an input 301 at a carrier recovery circuit 302 to recover the signals coherent to the carriers of the phase modulated signals. In a detector 303 in which phase modulated signals are inputted from the input 301 similarly, the phase modulated signals are detected by means of recovered carriers outputted from the carrier recovery circuit 302 and the detection output thereof is sent out from an output 304. Optimal coherent detection will be achieved if carriers are recovered at the circuit 302 without thermal noises or random FM noises which are caused by fading.
Most of the carrier recovery circuits currently in use are structured to remove mainly the effect of thermal noises, and although they can recover stable carriers under the conditions with many thermal noises, the phase of the recovered carriers cannot quite follow rapid changes such as occurring in random FM noises caused by fading to thereby degenerate the performance.
The differential detector, on the other hand, is inferior to the coherent detector in performance under thermal noises, but under fast fading which causes rapid phase changes, it shows better performance than the coherent detector.
FIG. 40 is a block diagram to show the basic structure of a differential detector.
In FIG. 40, phase modulated signals are inputted via an input 311 at a delay circuit to be delayed by an amount equivalent to one or two symbols of the data, and multiplied with a phase modulated signal which has been delayed by the detector 313 which receives signals from the input 311, so that detection output recovered from the phase difference therebetween is transmitted from an output 314.
The differential detector of this type is structured to detect input phase modulated signals by referring to the phase of the signal one or two symbols before, and does not require carrier recovery to thereby enable simplification of the circuit structure. However, it requires delay lines equivalent to one or two symbols of the data.
As it is not easy to manufacture delay lines which are high in precision and suitable to circuit integration, shift registers such as shown in FIG. 41 are usually utilized to delay phase modulated signals. In FIG. 41, the reference numeral 315 denotes a shift register using the output from a single frequency oscillator 316 as a clock and is equivalent to the delay circuit 312.
FIG. 42 shows in a block diagram a demodulator using a digital signal processing type detector.
In FIG. 42, phase modulated signals are inputted via an input 321 at multipliers 322.sub.1, 322.sub.2, and detected by signals having the frequency substantially similar to the carrier frequency (quasi-coherent detection). A single frequency oscillator 323 generates signals of the frequency substantially similar to the carrier frequency, and transmits the same to the multiplier 322.sub.1 as they are and to the multiplier 322.sub.2 via a .pi./2 shift circuit 324. The in-phase and quadrature signals or the outputs from the multipliers 322.sub.1 and 322.sub.2 are inputted at analog/digital converters (A/D) 326.sub.1 and 326.sub.2 via low pass filters (LPF) 325.sub.1 and 325.sub.2 to be digitized. Digital signals are inputted at a digital signal processing type detector 327 and detected coherently or differentially by digital signal processing. This method enables construction of various types of detectors by so programming the digital signal processing type detector 327.
When a detector is mounted on a mobile radio equipment, it is usually necessary to consider not only thermal noises but also random FM noises which are caused by fading. The prior art coherent detector could not quite solve the problems mentioned above. Besides, coherent detectors need voltage controlled oscillators for recovery of carriers, but it is quite difficult to mass-produce voltage controlled oscillators having uniform characteristics, and adjustment of variations is difficult. Voltage controlled oscillators are difficult to be digitized as well as to make characteristics uniform if they are incorporated in ICs.
Differential detectors are defective in that shift-registers of multi-stages need to be operated at fast speed in order to achieve a high precision in delay, but this consumes a large amount of power If a single frequency oscillator is used as an input clock for shift registers, when the carrier frequency of phase modulated signals drifts, it becomes difficult to conduct stable detection.
This invention was conceived in order to overcome the difficulties encountered in the prior art, and aims at providing a digital demodulator which can achieve excellent demodulation performance under fading, simplify the circuit structure, reduce power consumption, and be structured as a fully digitized integrated circuit which requires no adjustment.